Semiconductor memory device capable of carrying out stable...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Details

C365S230060, C365S189110, C365S233500

Reexamination Certificate

active

11101410

ABSTRACT:
A semiconductor memory device includes a word drive line, and a word line connected with memory cells. A first drive circuit drives the word drive line to a first voltage based on a main word signal, and resets the word drive line to a ground voltage in a time period for transition of an address signal. A second drive circuit outputs a signal of the first voltage to the word line based on a sub-word signal such that a data is read out from one of the memory cells. The main word signal and the sub-word signal are obtained from an address signal, and are signals taking the ground voltage or a second voltage which is lower than the first voltage.

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patent: 6646950 (2003-11-01), Akaogi
patent: 6804161 (2004-10-01), Mizugaki
patent: 2006/0104131 (2006-05-01), Sugawara et al.

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