Track and hold circuit

Details Track and hold circuit Track and hold circuit

2007-12-04

2007-12-04

Chang, Joseph (Department: 2817)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S094000, C327S095000, C327S096000, C331S00100A

Reexamination Certificate

active

10550343

ABSTRACT:
A track and hold circuit (1) comprising:—a linear amplifier (2) receiving a differential analog signal (D+, D−) and being controlled by a first binary clock signal (H+) having a first phase,—the linear amplifier (2) providing a feed-forward input signal substantially equal with the differential analog signal (D+, D−) to a pseudo latch circuit (3) in the first phase of the first binary clock signal (H+), said pseudo latch circuit (3) being controlled by a second binary clock signal (H−) for memorizing the input signal and providing a differential output signal (LD+, LD−) substantially equal with the input signal during a second phase of the first binary clock signal (H−), the second binary clock signal being substantially in antiphase with the first binary clock signal (H+).

REFERENCES:
patent: 5081373 (1992-01-01), Suzuki
patent: 5625308 (1997-04-01), Matsumoto et al.
patent: 5757234 (1998-05-01), Lane
patent: 6404285 (2002-06-01), Shkap
patent: 6489814 (2002-12-01), Hoogzaad et al.

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