Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2007-08-28
2007-08-28
Chan, Eddie (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
Reexamination Certificate
active
10839474
ABSTRACT:
A system and method for linking speculative results of load operations to register values. A system includes a memory file including an entry configured to store a first addressing pattern and a first tag. The memory file is configured to compare the first addressing pattern to a second addressing pattern of a load operation, and to link a data value identified by the first tag to a speculative result of the load operation if there is a match. The system further includes an execution core coupled to the memory file and configured to access the speculative result when executing a second operation that is dependent on the load operation, and a load store unit coupled to the memory file and configured to verify the link between the data value and the speculative result of the load operation by performing a comparison between one or more addresses.
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Alsup Mitchell
Haddad Ramsey W.
Ramani Krishnan V.
Sander Benjamin T.
Advanced Micro Devices , Inc.
Chan Eddie
Kowert Robert C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Petranek Jacob
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