Semiconductor memory module with bus architecture

Details Semiconductor memory module with bus architecture Semiconductor memory module with bus architecture

2007-11-20

2007-11-20

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C376S230000, C376S191000

Reexamination Certificate

active

11346570

ABSTRACT:
A semiconductor memory module, which is formed as an FBDIMM memory module, for example, has a planar design. In the 2R×4 configuration, semiconductor components are arranged in two rows on a top side of a module board and semiconductor memory components are likewise arranged in two rows on an underside of the module board. In contrast to a “Stacked DRAM” design, the semiconductor components in accordance with the planar design contain only one memory chip. By using a parallel routing for a command address bus and an on-die termination bus, the address, clock, and control buses can be adapted in terms of load, so that different signal propagation times on the different buses are avoided to the greatest possible extent.

REFERENCES:
patent: 5032783 (1991-07-01), Hwang et al.
patent: 6088829 (2000-07-01), Umemura et al.
patent: 2004/0143773 (2004-07-01), Chen

Affiliated with

Also associated with

Rating

Semiconductor memory module with bus architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory module with bus architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory module with bus architecture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3861675