Method of making assemblies having stacked semiconductor chips

Details Method of making assemblies having stacked semiconductor chips Method of making assemblies having stacked semiconductor chips

2007-06-12

2007-06-12

Smith, Zandra V. (Department: 2822)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S108000

Reexamination Certificate

active

11165877

ABSTRACT:
A method of manufacturing a plurality of semiconductor chip packages and the resulting chip package assemblies. The method includes providing a circuitized substrate having terminals and leads. A first microelectronic element is arranged with the substrate and contacts on the microelectronic element are connected to the substrate. A conductive member is placed on top of the first microelectronic element and is used to support a second microelectronic element. The second microelectronic element is arranged with the conductive member in a top and bottom position. The second microelectronic element is then also connected by leads from contacts on the second microelectronic element to pads and terminals on the circuitized substrate. The conductive member is then connected to a third pad or set of pads on the substrate. An encapsulant material may be deposited so as to encapsulate the leads and at least one surface of the microelectronic elements. The encapsulant material is then cured thereby defining a composite of chip assemblies which may be singulated into individual chip packages.

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