Vertical floating-gate transistor

Details Vertical floating-gate transistor Vertical floating-gate transistor

1991-02-19

1992-08-25

Thomas,, Tom

Fishing, trapping, and vermin destroying

437 48, 437 52, 437203, 437228, H01L 2170

Patent

active

051418860

ABSTRACT:
An electrically erasable, programmable, read-only-memory, floating-gate, metal-oxide-semiconductor transistor constructed in a trench extending through layers of P-type and N-type material formed on a semiconductor substrate. The floating-gate transistor is comprised of two source-drain regions, a channel region, a floating gate, a programming gate, and gate-oxide layers and is characterized by a floating-gate to channel capacitance that is small relative to the programming-gate to floating-gate capacitance, thereby allowing charging of the floating gate using programming and erasing voltages of less magnitude than might otherwise be necessary.

REFERENCES:
patent: 3924265 (1975-12-01), Rodgers
patent: 4398339 (1983-08-01), Blanchar et al.
patent: 4503449 (1985-03-01), David et al.
patent: 4697201 (1987-09-01), Mihara
Ammar et al. IEEE Transactions on Electron Devices, vol. ED 27, May 1980 pp. 907-914.
Rodgers et al. IEEE J. of Solid State Circuits vol. SCR No. 5, Oct. 1977 pp. 515-524.
Magdo et al., IBMTDB, vol. 14, No. 3, Aug. 1971 p. 751.

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