Non-volatile memory dynamic operations

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190, C365S185280, C365S185060

Reexamination Certificate

active

11124220

ABSTRACT:
A dynamic programming method for a non-volatile storage device is described. Memory cells are provided arrayed in R rows. Sub bit lines are provided coupled to voltage supply lines through select circuits. During program operation, the select circuits are switched such that one or more of the source side sub bit line or the drain side sub bit line is floating when all other program voltages are applied to a selected cell.

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