Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...

Reexamination Certificate

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C257S057000, C257S347000, C257SE29151

Reexamination Certificate

active

11137660

ABSTRACT:
A first thin film transistor including a gate electrode, a source region, a drain region, a GOLD region, and a channel region is formed at a first region at a TFT array substrate. A second thin film transistor including a gate electrode, a source region, drain region, a GOLD region, and a channel region is formed at a second region. The GOLD length (0.5 μm) of the GOLD region of the second thin film transistor is set shorter than the GOLD length (1.5 μm) of the GOLD region of the first thin film transistor. Accordingly, a semiconductor device directed to reducing the area occupied by semiconductor elements is obtained.

REFERENCES:
patent: 6365917 (2002-04-01), Yamazaki
patent: 6746965 (2004-06-01), Uehara et al.
patent: 2005/0263770 (2005-12-01), Sugahara et al.
patent: 2000-252473 (2000-09-01), None
patent: 2002-76351 (2002-03-01), None
patent: 2002-231953 (2002-08-01), None
Web Document by Wikipedia about Polycrystalline Silicon or Polysilicon (2 pages).
U.S. Appl. No. 11/091,570, filed Mar. 29, 2005, Toyoda et al.
U.S. Appl. No. 11/109,818, filed Apr. 20, 2005, Toyoda et al.
U.S. Appl. No. 11/137,660, filed May 26, 2005, Sugahara et al.
U.S. Appl. No. 11/376,414, filed Mar. 16, 2006, Toyoda et al.

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