Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2007-08-07
2007-08-07
Malsawma, Lex (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257SE29117
Reexamination Certificate
active
11051005
ABSTRACT:
The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist110is formed. The pattern is etched by using the photoresist pattern as an etching mask to form a gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.
REFERENCES:
patent: 5010027 (1991-04-01), Possin et al.
patent: 5439837 (1995-08-01), Hata et al.
patent: 5441905 (1995-08-01), Wu
patent: 5468987 (1995-11-01), Yamazaki et al.
patent: 5576229 (1996-11-01), Murata et al.
patent: 5602047 (1997-02-01), Tsai et al.
patent: 5637519 (1997-06-01), Tsai et al.
patent: 5684365 (1997-11-01), Tang et al.
patent: 5702960 (1997-12-01), Moon
patent: 5719078 (1998-02-01), Kim
patent: 5877083 (1999-03-01), Yamazaki
patent: 5879969 (1999-03-01), Yamazaki et al.
patent: 5917225 (1999-06-01), Yamazaki et al.
patent: 5952708 (1999-09-01), Yamazaki
patent: 5990542 (1999-11-01), Yamazaki
patent: 6063653 (2000-05-01), Lin et al.
patent: 6091196 (2000-07-01), Codama
patent: 6104461 (2000-08-01), Zhang et al.
patent: 6114183 (2000-09-01), Hamada et al.
patent: 6165824 (2000-12-01), Takano et al.
patent: 6169293 (2001-01-01), Yamazaki
patent: 6218219 (2001-04-01), Yamazaki et al.
patent: 6229506 (2001-05-01), Dawson et al.
patent: 6239470 (2001-05-01), Yamazaki
patent: 6242758 (2001-06-01), Yamazaki et al.
patent: 6268695 (2001-07-01), Affinito
patent: 6396105 (2002-05-01), Yamazaki et al.
Malsawma Lex
Semiconductor Energy Laboratory Co,. Ltd.
LandOfFree
Method of manufacturing thin film transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of manufacturing thin film transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing thin film transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3834280