Circuit arrangement and method for switching high-voltage...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S189050, C365S189120, C365S230080

Reexamination Certificate

active

11233506

ABSTRACT:
The invention relates to a circuit arrangement for switching high-voltage signals with low-voltage signals, particularly for driving a semiconductor memory arrangement, comprising a low-voltage logic device for generating a low-voltage signal with a first predetermined logic level and with a second predetermined logic level, comprising a latch for receiving and latching the low-voltage signal and for outputting an output signal with a voltage dependent on the logic level of the received low-voltage signal, comprising a level shifter for increasing the value of the voltage of the latched low-voltage signal to a voltage of a high-voltage signal, as a result of which the voltage of the output signal output essentially rises to the voltage of the high-voltage signal, the latch exhibiting one or more high-voltage transistors.

REFERENCES:
patent: 4982111 (1991-01-01), Nakaizumi
patent: 5265052 (1993-11-01), D'Arrigo et al.
patent: 6489828 (2002-12-01), Wang et al.
patent: 6556061 (2003-04-01), Chen et al.
patent: 6801053 (2004-10-01), Sun
patent: 197 14 658 (1998-10-01), None
patent: 06338197 (1994-12-01), None
patent: 10011989 (1998-01-01), None

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