Output circuit of a semiconductor device

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307200B, 307542, 307551, 307555, H03K 19003, H03K 19017, H03K 1716

Patent

active

045270775

ABSTRACT:
An output circuit of a semiconductor device for suppressing erroneous operation due to potential variations of the power supply line or the ground line. The output circuit comprises an output stage inverter connected between the power supply line and the ground line and a clamping circuit for clamping the voltages applied to the output stage inverter. A large instantaneous current which flows through the output stage inverter during a transition of state is greatly suppressed so that erroneous operation is prevented.

REFERENCES:
patent: 2853630 (1958-09-01), Lane et al.
patent: 3508084 (1970-04-01), Warner
patent: 3723759 (1973-03-01), Giguere
patent: 4065678 (1977-12-01), Reese et al.
patent: 4174535 (1979-11-01), Mueller et al.

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