Shift register for safely providing a configuration bit

Details Shift register for safely providing a configuration bit Shift register for safely providing a configuration bit

2007-02-13

2007-02-13

Lam, Tuan T. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

C377S081000, C377S078000, C327S202000

Reexamination Certificate

active

11004047

ABSTRACT:
The invention relates to a shift register cell for safely providing a configuration bit having a master latch which can be connected to a serial data input on the shift register cell for the purpose of buffer storing a data bit; a first slave latch which can be connected to the master latch for the purpose of buffer storing the data bit; at least one second slave latch which can be connected to the master latch for the purpose of buffer storing the data bit, and having an evaluation logic unit which outputs the configuration bit on the basis of the data bits which are buffer stored in the master latch and in the slave latches. In addition, the invention provides a shift register for safely providing configuration bits which has a plurality of inventive shift register cells which are connected in series to form a shift register chain.

REFERENCES:
patent: 3812476 (1974-05-01), Cragon
patent: 5132993 (1992-07-01), Nishiura et al.
patent: 5208833 (1993-05-01), Erhart et al.
patent: 5598120 (1997-01-01), Yurash
patent: 5670901 (1997-09-01), Yoshida
patent: 6011740 (2000-01-01), Trimberger
patent: 6879313 (2005-04-01), Kubota et al.
patent: 2003/0120987 (2003-06-01), Savaria et al.

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