Method for avoiding lithographic rounding effects for semiconduc

Details Method for avoiding lithographic rounding effects for semiconduc Method for avoiding lithographic rounding effects for semiconduc

1994-04-29

1996-06-04

Fourson, George

Fishing, trapping, and vermin destroying

437229, 437924, 148DIG102, H01L 2144

Patent

active

055232582

ABSTRACT:
The use of separate masks to pattern the same layer of material formed over a semiconductor substrate serves to reduce or avoid lithographic rounding effects. A layer of material formed over a semiconductor substrate may be patterned in accordance with separate masks. A first mask may have a feature which is substantially perpendicular to a feature of a separate second mask. Where the layer is patterned to form transistor gates, the minimum amount each transistor gate should extend over the edge of its active region under the endcap rule may be reduced. In this regard, a line pattern mask and a gap mask are used to avoid lithographic rounding effects in forming the transistor gates. Semiconductor devices may thus be fabricated with higher packing densities as transistors may be placed closer to one another.

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