Method for fabricating and inspecting semiconductor integrated c

Details Method for fabricating and inspecting semiconductor integrated c Method for fabricating and inspecting semiconductor integrated c

1993-08-26

1996-06-04

Thomas, Tom

Fishing, trapping, and vermin destroying

437 52, 437 7, 437 8, H01L 2170

Patent

active

055232523

ABSTRACT:
The turn around time required for fabricating a semiconductor integrated circuit from initial conception through packaging may be dramatically reduced by testing the electrostatic integrity of the integrated circuit during fabrication rather than after packaging. In such a method, an electrostatic test device is formed on the same substrate on which the integrated circuit is formed. The test element may or may not comprise a portion of the integrated circuit itself, and a plurality of such test elements may in fact be formed along scribe lines in the wafer. Prior to dicing of individual integrated circuits, the electrostatic withstand capacity of the test element is determined by locating the power required to destroy the test element. The electrostatic destruction withstanding value of the integrated circuit is then derived from the maximum nondestruct power of the test element. Thus, an inspection step for electrostatic withstand capacity may be performed during fabrication, and need not await final packaging.

REFERENCES:
patent: 4881113 (1989-11-01), Momodomi et al.
patent: 5038248 (1991-08-01), Meyer
patent: 5100822 (1992-03-01), Mitani
patent: 5116767 (1992-05-01), DeChiaro et al.
patent: 5166089 (1992-11-01), Chen et al.
patent: 5270565 (1993-12-01), Lee et al.

Affiliated with

Also associated with

Rating

Method for fabricating and inspecting semiconductor integrated c does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating and inspecting semiconductor integrated c, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating and inspecting semiconductor integrated c will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-383031