Semiconductor memory device having a decoupling capacitor

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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C257SE27088

Reexamination Certificate

active

11154922

ABSTRACT:
A semiconductor memory device comprises a cell capacitor having a first buried contact connected with a semiconductor substrate of a cell region and a first storage node connected with the first buried contact, and a decoupling capacitor for reducing a coupling noise, having a plurality of second buried contacts formed on a semiconductor substrate portion adjacent in the cell region and extended in parallel with each other and a plurality of second storage nodes connected with the second buried contacts.

REFERENCES:
patent: 6888716 (2005-05-01), List et al.
patent: 2001/0014040 (2001-08-01), Ooishi
patent: 09-283718 (1997-10-01), None
patent: 2000-150824 (2000-05-01), None
patent: 2000-252437 (2000-09-01), None
patent: 10-2004-0059437 (2004-07-01), None
Patent Abstracts of Japan for Publication No. 09-283718.
Patent Abstracts of Japan for Publication No. 2000-150824.
Patent Abstracts of Japan for Publication No. 2000-252437.
Korean Intellectual Property Office Korean Patent Abstracts for Publication No. 10-2004-0059437.

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