Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2007-05-01
2007-05-01
Tran, Minhloan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257S738000, C257SE23020
Reexamination Certificate
active
11146044
ABSTRACT:
In order to inhibit the connection failure due to the degradation of the connection interface strength of the electrode pad and the warp thereof in the semiconductor device having an electrode pad, a metal layer formed on the electrode pad, and a metal bump formed on the metal layer, in the present invention, gold (Au) is contained in the metal layer, the metal bump is made of solder mainly made of Sn and designed to have an average height H of 100 μm or less per unit area in the electrode pad, and the concentration of Au of the metal layer dissolved in the solder is set to 1.3×10−3(Vol %) or less. More preferably, the metal bump contains palladium (Pd), and the solder coating for forming the metal bump on the electrode pad is performed by using the dipping and the paste printing in combination.
REFERENCES:
patent: 2002/0171152 (2002-11-01), Miyazaki
Atsushi Yamaguchi et al., “Microstructure and Properties of CSP (Chip Size Package) Solder Joint using Sn-Zn-Bi Solder, -Influence of Ni/Au plating on solder joint properties”, Mate 2003, pp. 309-314.
Y. Soga, “Influence of Interfacial Reaction Layer on Reliability of CSP Joint Using Sn-8Zn-3Bi Solder”, MES 2003, pp. 57-60.
Kenzo Hatada, “A study of an solder bump fabrication technology using of anisotropic electro-less plating and dipping processes of Ni”, MES 2003, pp. 272-275.
Abe Yoichi
Kawakubo Hiroshi
Kimoto Ryosuke
Yamamoto Ken-ichi
Yamashita Shiro
Liu Benjamin Tzu-Hung
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Renesas Technology Corp.
Tran Minhloan
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