Precharge arrangement for read access for integrated...

Details Precharge arrangement for read access for integrated... Precharge arrangement for read access for integrated...

2007-06-26

2007-06-26

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S203000

Reexamination Certificate

active

11005804

ABSTRACT:
Precharge arrangement for read access for integrated nonvolatile memories having at least one memory cell (2), at least one source line (8), at least one bit line (9), at least one sense amplifier (3) and at least one precharge potential, the bit line (9) continuously having the precharge potential in a deselected state of the bit line (9), and the source line (8) having a predetermined reference potential, in particular a ground potential (10), in a selected state of the bit line (9).

REFERENCES:
patent: 4451905 (1984-05-01), Moyer
patent: 4858194 (1989-08-01), Terada et al.
patent: 5465235 (1995-11-01), Miyamoto
patent: 5812456 (1998-09-01), Hull et al.
patent: 6125057 (2000-09-01), Loeper
German Office Action dated Oct. 7, 2004.

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