Semiconductor device and its manufacture

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity

Reexamination Certificate

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Details

C257S030000, C257S038000, C257S039000

Reexamination Certificate

active

10707525

ABSTRACT:
In a logic area, impurities are doped into the gate electrode and the source/drain diffusion regions of a MIS transistor. Thereafter in a memory cell area, word lines are patterned, source/drain regions are formed, and contact holes are formed. Side wall spacers of the MIS transistor in the logic area are made of silicon oxide. A semiconductor device of logic-memory can be manufactured by a reduced number of manufacture processes while the transistor characteristics are stabilized and the fine patterns in the memory cell are ensured.

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patent: 6150689 (2000-11-01), Narui et al.
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patent: 6174773 (2001-01-01), Fujishima
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patent: 2005/0227440 (2005-10-01), Ema et al.
patent: 2005/0230781 (2005-10-01), Ema et al.
patent: 2006/0094229 (2006-05-01), Ema et al.
patent: 10-144886 (1998-05-01), None
patent: 11-026711 (1999-01-01), None

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