Multi-modulus programmable frequency divider

Details Multi-modulus programmable frequency divider Multi-modulus programmable frequency divider

2007-11-20

2007-11-20

Cox, Cassandra (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

C377S047000

Reexamination Certificate

active

10711410

ABSTRACT:
A programmable frequency divider for dividing the frequency of a source signal according to a selectable divisor which is obtained based on a plurality of divisor signals and outputting a result signal having a divided frequency includes at least one cell of a first type. The cells of the first type are cascaded with each other. The programmable frequency divider synchronously resets all of the cells of the first type according to a reset signal in order to selectively switch each cell of the first type to perform a divide-by-two or divide-by-three operation according to a corresponding divisor signal. The last cell of the first type outputs the result signal having the divided frequency.

REFERENCES:
patent: 4741004 (1988-04-01), Kane
patent: 5065415 (1991-11-01), Yamashita
patent: 5349622 (1994-09-01), Gorisse
patent: 5614869 (1997-03-01), Bland
patent: 5948046 (1999-09-01), Hagberg
patent: 6760397 (2004-07-01), Wu et al.
patent: 2003/0095621 (2003-05-01), Wu et al.
patent: WO 03/043193 (2003-05-01), None

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