Reference timing architecture

Details Reference timing architecture Reference timing architecture

2007-05-22

2007-05-22

Rao, Seema S. (Department: 2616)

Multiplex communications

Communication techniques for information carried in plural...

Combining or distributing information via time channels

C370S503000, C375S358000, C375S362000

Reexamination Certificate

active

10150474

ABSTRACT:
A reference timing architecture is disclosed that provides a level of flexibility that was not available with the architecture in the prior art. In particular, the present invention provides for multiple reference timing outputs that can be routed to equipment nodes relying on the timing information, wherein each of the timing processing paths that provide timing outputs can be controlled independently of one another.

REFERENCES:
patent: 5818839 (1998-10-01), Sterne
patent: 5883533 (1999-03-01), Matsuda et al.
patent: 5903620 (1999-05-01), Kariya
patent: 5999543 (1999-12-01), Bortolini
patent: 6349391 (2002-02-01), Petivan
patent: 6714610 (2004-03-01), Wolf
patent: 6879651 (2005-04-01), Saeki
patent: 7023942 (2006-04-01), Roberts et al.

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