Sigma-delta modulator

Details Sigma-delta modulator Sigma-delta modulator

2007-07-31

2007-07-31

Mai, Lam T (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S150000

Reexamination Certificate

active

11384760

ABSTRACT:
Circuits and methods to achieve a low-noise and low offset continuous sigma-delta modulator used e.g. for battery management are disclosed. Continuous integration of input is enabled by special switching principle of three parallel integrators. Precharging of integrator output in so called pre-run mode minimizes integrator leakage and non-ideal effects by connecting a Gm in pre-run mode either to input voltage or to a reference voltage depending this Gm is being used in a following clock period. Parasitic effects due to switching at first integration capacitor are minimized by using buffer amplifiers tracking the voltage on integration capacitors.

REFERENCES:
patent: 5030954 (1991-07-01), Ribner
patent: 5148166 (1992-09-01), Ribner
patent: 5148167 (1992-09-01), Ribner
patent: 5661432 (1997-08-01), Chang et al.
patent: 6160506 (2000-12-01), Pellon
patent: 6310512 (2001-10-01), Briskin et al.
patent: 6369730 (2002-04-01), Blanken et al.
patent: 6734723 (2004-05-01), Huijsing et al.
patent: 6891488 (2005-05-01), McDaniel et al.
patent: 6907374 (2005-06-01), Tsyrganovich
“A 10aV-Offset 8k Hz Bandwidth 4th-Order Chopped Sigma-Delta A/D Converter for Battery Management”, by Peter G. Blanken et al., ISSCC 2002, Session 23/ Analog Techniqued.
23.5, 2002 IEEE Int'l Solid-State Circuits Conf.
2002 IEEE Int'l Solid-State Circuits Conf., “Outline”.

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