Semiconductor devices having a pocket line and methods of...

Details Semiconductor devices having a pocket line and methods of... Semiconductor devices having a pocket line and methods of...

2007-03-06

2007-03-06

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S734000

Reexamination Certificate

active

10942367

ABSTRACT:
In one embodiment, a semiconductor device comprises an active region isolated by a device isolation layer placed in a semiconductor substrate having a main surface. A molding hole is placed in the semiconductor substrate on the active region. A pocket insulating layer pattern conformally covers the molding hole. A pocket line extends across the active region, filling the molding hole and protruding from the main surface of the semiconductor substrate. The pocket line includes a pocket conductive layer line, a lower metal layer line, and an upper metal layer line, which are sequentially stacked on the pocket insulating later pattern. The device further may further include a line capping layer pattern placed on the pocket line. The line capping layer pattern and the pocket conductive layer line may surround the lower and upper metal layer lines.

REFERENCES:
patent: 6159835 (2000-12-01), Visokay et al.
patent: 6838737 (2005-01-01), Kim et al.
patent: 7081409 (2006-07-01), Kang et al.
patent: 2002/0022355 (2002-02-01), Kim
patent: 2000-0027369 (2000-05-01), None
English language abstract of Korean Publication No. 2000-0027369.

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