Semiconductor storage device and semiconductor storage...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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Reexamination Certificate

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11368484

ABSTRACT:
A semiconductor storage device comprises a semiconductor layer; a plurality of memory cells formed on the semiconductor layer, data writing, erasing or reading with respect to each of the memory cells being possible based on a voltage applied to a control electrode and a voltage applied to the semiconductor layer; a first booster circuit supplying a voltage to control electrodes of selected memory cells into which data is to be written; and a second booster circuit supplying a voltage to control electrodes of inhibited memory cells into which data is not to be written, wherein when erasing data in the memory cells, a potential at the semiconductor layer is boosted in a first boosting mode in which a boosting capability of the first booster circuit is low and a boosting capability of the second booster circuit is high, and then the potential at the semiconductor layer is boosted in a second boosting mode in which the boosting capability of the second booster circuit is low and the boosting capability of the first booster circuit is high.

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patent: 6002354 (1999-12-01), Itoh et al.
patent: 6061289 (2000-05-01), Itoh et al.
patent: 2005/0168263 (2005-08-01), Fukuda et al.
patent: 2006/0134845 (2006-06-01), Pham et al.
patent: 8-255493 (1996-10-01), None
patent: 11-122109 (1999-04-01), None

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