Comparator with offset compensation

Details Comparator with offset compensation Comparator with offset compensation

2007-04-24

2007-04-24

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S063000

Reexamination Certificate

active

11038386

ABSTRACT:
A differential comparator with reduced offset. The differential comparator includes a first transistor coupled to a first input current and a second transistor coupled to a second input current. The first and second transistors are biased as diodes during a reset phase to store an offset voltage on parasitic capacitances of the first and second transistors. The first and second transistors are connected together as a latch to provide an output during a latch phase. Drain currents of the first and the second transistors substantially equal the first and the second input currents, respectively, during the reset phase and at the beginning of the latch phase. During the latch phase, currents approximately twice as large as differential-mode signal currents provided by the first and the second input currents are provided to the first and the second transistors, respectively.

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