Semiconductor memory device provided with a write column...

Details Semiconductor memory device provided with a write column... Semiconductor memory device provided with a write column...

2007-07-31

2007-07-31

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S189011, C365S230030

Reexamination Certificate

active

11506834

ABSTRACT:
A Y selection line for write for controlling operations of a column selection switch within a write amplifier and a Y selection line for read for controlling operations of a column selection switch within a read amplifier are provided individually and the column selection switch within the read amplifier is set to the non-operating condition during the write operation. Accordingly, a through-current during the write operation may be reduced. In this case, the write IO line and read IO line are allocated crossing sense amplifier columns, while the column selection line for write and column selection line for read are allocated in parallel to the sense amplifier columns.

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