Methods of forming semiconductor-on-insulator constructions

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S406000, C438S459000, C438S479000, C257SE21122, C257SE21567, C257SE21569

Reexamination Certificate

active

11218201

ABSTRACT:
The invention encompasses a method of forming a semiconductor-on-insulator construction. A substrate is provided. The substrate includes a semiconductor-containing layer over an insulative mass. The insulative mass comprises silicon dioxide. A band of material is formed within the insulative mass. The material comprises one or more of nitrogen argon, fluorine, bromine, chlorine, iodine and germanium.

REFERENCES:
patent: 5071785 (1991-12-01), Nakazato et al.
patent: 5468657 (1995-11-01), Hsu
patent: 5516707 (1996-05-01), Loh et al.
patent: 5767548 (1998-06-01), Wonderak et al.
patent: 5795813 (1998-08-01), Hughes et al.
patent: 6071791 (2000-06-01), Hughes et al.
patent: 6144072 (2000-11-01), Iwamatsu et al.
patent: 6249026 (2001-06-01), Matsumoto et al.
patent: 6410938 (2002-06-01), Xiang
patent: 6509613 (2003-01-01), En et al.
patent: 6596570 (2003-07-01), Furukawa
patent: 6958282 (2005-10-01), Huttner et al.
patent: 6992355 (2006-01-01), Mouli
patent: 2001/0039098 (2001-11-01), Lu
patent: 2002/0145174 (2002-10-01), Aipperspach et al.
patent: 2003/0189229 (2003-10-01), Mouli
patent: 2004/0108566 (2004-06-01), Himi et al.
patent: 2004/0175899 (2004-09-01), Lu et al.
patent: 2006/0003562 (2006-01-01), Mouli
“Novel NICE (Nitrogen Implantation into CMOS Gate Electrode and Source-Drain) Structure for High Reliability and High Performance . . . ”; T. Kuroi et al.; 1993 IEEE; pp. 13.2.1-13.2.4.
“Dopant Redistribution in SOI during RTA: A Study on Doping in Scaled-down SI Layers”; Heemyong Park et al; 1999 IEEE.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods of forming semiconductor-on-insulator constructions does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of forming semiconductor-on-insulator constructions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming semiconductor-on-insulator constructions will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3790085

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.