Patent
1987-11-25
1990-04-24
LaRoche, Eugene R.
357 72, 357 75, 357 76, H01L 2302, H01L 2312, H01L 2316, H01L 2328
Patent
active
049204050
ABSTRACT:
An overcurrent limiting semiconductor device is provided comprising: a package having a base plate, sidewalls and a cover plate, at least one transistor fixed onto the base plate, terminal conductors respectively connected to the base, emitter and collector electrodes of the transistor which are led out through the cover plate, and a plurality of diode connected in series across the base/emitter of the transistor, with the diodes being disposed in a space provided between the cover plate and the base plate of the package, and connected to the base and emitter terminal conductors. This construction provides an integral overcurrent limiting semiconductor device which minimizes unnecessary limiting of the transistor collector-emitter current caused by a heating of the diodes by the transistor.
REFERENCES:
patent: 2817048 (1957-12-01), Thuermel et al.
patent: 3179855 (1965-04-01), Brombaugh
patent: 3575678 (1971-04-01), Barton
patent: 3715633 (1973-02-01), Nier
patent: 3784725 (1974-01-01), Perkins et al.
patent: 4430664 (1984-02-01), Matsunaga et al.
patent: 4639759 (1987-01-01), Neidig et al.
Itoh Shin-ichi
Shigekane Hisao
Fuji Electric & Co., Ltd.
LaRoche Eugene R.
Shingleton Michael B.
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