Multiple level programming in a non-volatile memory device

Details Multiple level programming in a non-volatile memory device Multiple level programming in a non-volatile memory device

2007-05-22

2007-05-22

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185180

Reexamination Certificate

active

11065986

ABSTRACT:
The programming method of the present invention minimizes program disturb by initially programming cells on the same wordline with the logical state having the highest threshold voltage. The remaining cells on the wordline are programmed to their respective logical states in order of decreasing threshold voltage levels.

REFERENCES:
patent: 6147910 (2000-11-01), Hsu
patent: 6181604 (2001-01-01), Lu
patent: 6538923 (2003-03-01), Parker
patent: 6845060 (2005-01-01), Lee
patent: 7020017 (2006-03-01), Chen et al.
patent: 2005/0254309 (2005-11-01), Kwon et al.

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