Method for erasing programmable interconnect cells for field...

Details Method for erasing programmable interconnect cells for field... Method for erasing programmable interconnect cells for field...

2007-01-09

2007-01-09

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185280

Reexamination Certificate

active

11171489

ABSTRACT:
A method for erasing a non-volatile memory cell interconnect switch in an FPGA comprises providing an FPGA having a core containing a plurality of non-volatile-memory-cell interconnect switches, each switch formed in a switch well region and coupled to a source/drain of an n-channel transistor formed in a grounded well region separate from the switch well region. A non-volatile memory cell interconnect switch is selected for erasing. The switch well region is disconnected from ground. A VCC potential is applied to the switch well region and to the drain of the n-channel transistor to which it is coupled and an erase potential is applied to the gate of the selected non-volatile memory cell interconnect switch.

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