Amplifier circuit with reduced power-off transients and...

Details Amplifier circuit with reduced power-off transients and... Amplifier circuit with reduced power-off transients and...

2007-09-04

2007-09-04

Choe, Henry (Department: 2817)

Amplifiers

Combined with automatic amplifier disabling switch means

C330S297000

Reexamination Certificate

active

11156645

ABSTRACT:
In an amplifier circuit with reduced power-off transients, an amplifier is provided for receiving an input signal and a reference signal to generate an output signal therefrom when it is enabled, and the amplifier is disabled when the supply voltage to the amplifier drops down to a threshold or to a level higher than the reference signal a threshold. The output stage transistor of the amplifier is applied with a body voltage to suppress the body diode parasitic to the output stage transistor to be forward-biased.

REFERENCES:
patent: 5151942 (1992-09-01), Sasaki
patent: 6208203 (2001-03-01), Jung et al.
patent: 6215339 (2001-04-01), Hedberg

Affiliated with

Also associated with

Rating

Amplifier circuit with reduced power-off transients and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Amplifier circuit with reduced power-off transients and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Amplifier circuit with reduced power-off transients and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3758797