Wafer packaging and singulation method

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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C257SE23123, C257SE23124, C257SE23128

Reexamination Certificate

active

11340321

ABSTRACT:
A multi-device lid for a micro device wafer has a plurality of micro devices. The multi-device lid includes a multi-lid substrate configured to cover the plurality of micro devices of the micro device wafer. The multi-lid substrate has a trench pattern with intersection portions and non-intersection portions on a first side of the multi-lid substrate. The trench pattern is configured such that the intersection portions of the trench pattern extend adjacent to at least two of the plurality of micro devices when the multi-lid substrate is coupled to the micro device wafer.

REFERENCES:
patent: 6055344 (2000-04-01), Fouquet et al.
patent: 6465355 (2002-10-01), Horsley
patent: 6528864 (2003-03-01), Arai
patent: 6537846 (2003-03-01), Lee et al.
patent: 6583524 (2003-06-01), Brandt
patent: 6590850 (2003-07-01), Eldredge et al.
patent: 6600201 (2003-07-01), Hartwell et al.
patent: 6630725 (2003-10-01), Kuo et al.
patent: 6632698 (2003-10-01), Ives
patent: 2002/0170175 (2002-11-01), Aigner et al.
IMAPS Advanced Technology Workshop on Packaging of MEMS and Related Micro Integrated Nano Systems, Workshop Presentations, Hilton San Jose South/Scotts Valley, Scotts Valley, CA, Nov. 8-10, 2001.

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