Semiconductor integrated circuit device

Electrical transmission or interconnection systems – Plural load circuit systems

Reexamination Certificate

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Details

C327S056000

Reexamination Certificate

active

10785181

ABSTRACT:
There is disclosed a semiconductor integrated circuit device capable of eliminating an influence of a power voltage drop generated in a circuit disposed in the semiconductor integrated circuit device to inhibit an operation defect or an operation speed decrease of the circuit. In a semiconductor integrated circuit device10including a power wiring18connected to a power supply (Vdd) via a power terminal12,a ground wiring20connected to a ground (0 V) via a ground terminal 14, and a plurality of circuits301to30fconnected in parallel with one another between the power wiring18and the ground wiring20,a negative power terminal16connected to a negative power supply (−Vdd) is disposed, and a current source22is disposed as a current generating section between the negative power terminal16and a node Gf on a ground wiring20side of the f-th circuit30fdisposed in a region most distant from the ground.

REFERENCES:
patent: 6288613 (2001-09-01), Bennett
patent: 6748572 (2004-06-01), Fujine
patent: 2004/0008733 (2004-01-01), Wedding
patent: 03-283460 (1991-12-01), None
patent: 05-315544 (1993-11-01), None
patent: 2002-368091 (2002-12-01), None
patent: 2003-124793 (2003-04-01), None

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