Nonvolatile semiconductor memory device and an operation...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S189050

Reexamination Certificate

active

11240510

ABSTRACT:
A nonvolatile semiconductor memory device comprises a memory cell array which a plurality of an electrically rewritable nonvolatile memory cell is arranged and a sense amplifier having first, second and third circuits holding write-in data; and the first circuit receives data from the outside and transmits the data to the second circuit and the third circuit, and the second circuit and the third circuit transmit the data to two adjacent bit lines respectively, and the data is written in simultaneously to a memory cell selected among the nonvolatile memory cells connected to the two adjacent bit lines.

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U.S. Appl. No. 11/235,206, filed Sep. 27, 2005, Kameda et al.
U.S. Appl. No. 11/240,510, filed Oct. 3, 2005, Nagashima.

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