Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-03-13
2007-03-13
Shalwala, Bipin (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S095000, C345S204000, C345S214000, C377S064000, C377S070000, C377S107000
Reexamination Certificate
active
10376320
ABSTRACT:
In a shift register, which is for use in an image display apparatus of the TFT active matrix type in which a driver circuit is integrally provided on a display panel, and which is so arranged as to boost a start pulse SP to a start pulse SPO by using a level shifter, and to supply the start pulse SPO to a flip-flop F1of a shift register section, the start pulse SP having an amplitude lower than a driving voltage and being supplied thereto, the shift register is provided with an operation control circuit for inactivating the level shifter when the first stage flip-flop F1outputs an output signal S1and activates the level shifter when a last stage flip-flop Fn outputs an output signal Sn. Therefore, it is possible to reduce power consumption of the level shifter during a period in which the start pulse SPO is transmitted from a flip-flop F2to a flip-flop Fn−1.
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Korean Office Action and English translation thereof mailed Mar. 29, 2005 in corresponding Korean application No. 10-2003-18417.
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Gyouten Seijirou
Matsuda Eiji
Washio Hajime
Kovalick Vincent E.
Nixon & Vanderhye PC
Shalwala Bipin
Sharp Kabushiki Kaisha
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