Micro-operation un-lamination

Details Micro-operation un-lamination Micro-operation un-lamination

2007-04-17

2007-04-17

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to accommodate variable length...

C712S212000

Reexamination Certificate

active

10407468

ABSTRACT:
A processor may include an instruction decoder to decode macroinstructions into micro-operations. In some embodiments, the instruction decoder may include a first decoder and a second decoder. The first decoder may decode a macroinstruction having SSE data type operands into a laminated micro-operation, and may generate unlamination information for the laminated micro-operation. The second decoder may generate from the laminated micro-operation and the unlamination information two or more micro-operations, where operands of the two or more micro-operations each correspond to a half of one of the SSE operands of the macroinstruction.

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