Semiconductor memory device in form of shift register with two-p

Details Semiconductor memory device in form of shift register with two-p Semiconductor memory device in form of shift register with two-p

1986-05-19

1988-01-19

Fears, Terrell W.

Static information storage and retrieval

Plural shift register memory devices

365233, 377 64, G11C 1300

Patent

active

047208155

ABSTRACT:
A semiconductor memory device in the form of a shift register is supplied with two-phase clock signals. One of the two-phase clock signal lines is connected to even order shift register elements of the shift register, and the other of the two-phase clock signal lines is connected to odd order shift register elements of the shift register. Each of the shift register elements includes an output node, a gate connected between the output node and a clock signal supplying node, a charge-up circuit responsive to the output signal of the preceding shift register element for preliminarily charging a control node of the gate, and a discharge circuit responsive to the output of the succeeding shift register element for releasing the charge of the control node of the gate.

REFERENCES:
patent: 4641278 (1987-02-01), Saito

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