Nonvolatile integrated circuit memory devices having staged...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S194000

Reexamination Certificate

active

11199425

ABSTRACT:
A nonvolatile integrated circuit memory device includes a memory cell array having a plurality of memory cells. A high voltage generating unit generates first, second, and third program voltages used in programming the memory cell array. A program control unit controls times of applying the second and third program voltages to the memory cell array responsive to the first program voltage. Programming methods for the nonvolatile integrated circuit memory devices are also provided.

REFERENCES:
patent: 5748531 (1998-05-01), Choi
patent: 6529413 (2003-03-01), Lee et al.
patent: 6667907 (2003-12-01), Chaya et al.
patent: 6754109 (2004-06-01), Fastow et al.
patent: 100192572 (1999-01-01), None
patent: 1020000054882 (2000-09-01), None
patent: 1020010060574 (2001-07-01), None

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