Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
2007-05-29
2007-05-29
Pizarro, Marcos D. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C257S389000, C257SE27064
Reexamination Certificate
active
10894019
ABSTRACT:
Provided is a manufacturing method of a semiconductor integrated circuit device having a plurality of first MISFETs in a first region and a plurality of second MISFETs in a second region, which comprises forming a first insulating film between two adjacent regions of the first MISFET forming regions in the first region and the second MISFET forming regions in the second region; forming a second insulating film over the surface of the semiconductor substrate between the first insulating films in each of the first and second regions; depositing a third insulating film over the second insulating film; forming a first conductive film over the third insulating film in the second region; forming, after removal of the third and second insulating films from the first region, a fourth insulating film over the surface of the semiconductor substrate in the first region; and forming a second conductive film over the fourth insulating film; wherein the third insulating film remains over the first insulating film in the second region. The present invention makes it possible to raise the threshold voltage of a parasitic MOS and in addition, to suppress occurrence of an NBT phenomenon.
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Ishida Susumu
Kouketsu Masami
Saitou Kazunari
Yasuoka Hideki
Miles & Stockbridge P.C.
Pizarro Marcos D.
Renesas Technology Corp.
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