Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2007-01-30
2007-01-30
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Floating gate
Multiple values
C365S185240, C365S189011, C365S230060
Reexamination Certificate
active
11058320
ABSTRACT:
A semiconductor memory device includes: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein, each memory cell storing one of first, second, third and fourth data defined as being arranged in order of threshold voltage height; a read/write circuit configured to read data of and write data in the memory cell array; and a controller configured to control the read/write circuit so as to execute first and second write sequences, the first write sequence being defined as to write the second data into a first selected memory cell or cells within a selected page of the memory cell array which has been initialized in the first data state, the second write sequence being defined as to write the fourth data into a second selected memory cell or cells within memory cells storing the second or first data in the selected page, and successively write the third data into a third selected memory cell or cells within memory cells storing the first or second data in the selected page.
REFERENCES:
patent: 2002/0126531 (2002-09-01), Hosono et al.
patent: 2003/0133338 (2003-07-01), Kanada et al.
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