NOR flash memory device using bit scan method and related...

Details NOR flash memory device using bit scan method and related... NOR flash memory device using bit scan method and related...

2007-09-25

2007-09-25

Yoha, Connie C. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S185230, C365S185240, C365S185030

Reexamination Certificate

active

11320470

ABSTRACT:
A NOR flash memory device configured to perform a program operation using an ISPP scheme, and comprising a plurality of memory cells, a word line voltage generator, and a scan controller is provided. A method of programming the NOR flash memory device comprising a bit scan method is also provided. The maximum number of cells that may be programmed simultaneously in the bit scan method is indicated by a scan bit number. The scan bit number may be changed by the scan controller during the program operation.

REFERENCES:
patent: 6172917 (2001-01-01), Kataoka et al.
patent: 6314025 (2001-11-01), Wong
patent: 6597605 (2003-07-01), Kreifels et al.
patent: 11-353886 (1999-12-01), None
patent: 1999-0076163 (1999-10-01), None
patent: 1020000027297 (2000-05-01), None
patent: 1020020028331 (2002-04-01), None

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