Method and apparatus for trimming a phase detector in a...

Details Method and apparatus for trimming a phase detector in a... Method and apparatus for trimming a phase detector in a...

2007-09-18

2007-09-18

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

C327S012000

Reexamination Certificate

active

11239916

ABSTRACT:
Methods and apparatus are provided for trimming a phase detector in a delay-locked-loop. A latch that evaluates a phase offset between two signals is trimmed by applying two signals to the latch that are substantially phase aligned; obtaining a phase offset between the two signals measured by the latch; and adjusting a trim setting of one or more buffers associated with the two signals until the phase offset satisfies one or more predefined criteria. The two signals can be a clock signal and an inverted version of the clock signal. The two signals can be a source of phase aligned data generated from a single clock source.

REFERENCES:
patent: 6998889 (2006-02-01), Best
patent: 7057418 (2006-06-01), Fu et al.
patent: 7102402 (2006-09-01), Kurd et al.

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