Method for manufacturing semiconductor integrated circuit

Details Method for manufacturing semiconductor integrated circuit Method for manufacturing semiconductor integrated circuit

2007-07-17

2007-07-17

Chen, Jack (Department: 2813)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Subsequent separation into plural bodies

C438S455000, C438S459000

Reexamination Certificate

active

10322555

ABSTRACT:
A method for manufacturing a semiconductor integrated circuit includes steps of forming a semiconductor element on a semiconductor substrate and separating only a function layer including the semiconductor element, which is a surface layer of the semiconductor substrate, from the semiconductor substrate. The semiconductor element is preferably a compound semiconductor device including at least one of a light emitting diode, a vertical cavity surface emitting laserdiode, a photodiode, a high electron mobility transistor, an inductor, a capacitor, a resistor, and a heterojunction bipolar transistor.

REFERENCES:
patent: 4356429 (1982-10-01), Tang
patent: 4539507 (1985-09-01), VanSlyke et al.
patent: 5073230 (1991-12-01), Maracas et al.
patent: 5286335 (1994-02-01), Drabik et al.
patent: 5300788 (1994-04-01), Fan et al.
patent: 5391257 (1995-02-01), Sullivan et al.
patent: 5401983 (1995-03-01), Jokerst et al.
patent: 5465009 (1995-11-01), Drabik et al.
patent: 5827751 (1998-10-01), Nuyen
patent: 6033995 (2000-03-01), Muller
patent: 6214733 (2001-04-01), Sickmiller
patent: 6291266 (2001-09-01), Sayyah
patent: 57-51781 (1982-03-01), None
patent: 59-194393 (1984-11-01), None
patent: A 63-175860 (1988-07-01), None
patent: A 2-135359 (1990-05-01), None
patent: A 2-135361 (1990-05-01), None
patent: A 2-209988 (1990-08-01), None
patent: A 3-379992 (1991-02-01), None
patent: A 3-152184 (1991-06-01), None
patent: A 6-151720 (1994-05-01), None
patent: A 9-503622 (1997-04-01), None
patent: A 63-70257 (1998-03-01), None
patent: A 2000-58562 (2000-02-01), None
patent: WO 95/09438 (1995-04-01), None
Ali Ersen et al.; “Direct Bonding of Gaas Films on Silicon Circuits by Epitaxial Liftoff”. Solid State Electronics, Elsevier Science Publishers, Barking, GB. vol. 36, No. 12, pp. 1731-1739 Dec. 1, 1993.
C. Kaneshiro et al.; “Transfer and Bonding Process of Semiconcductor Coupled SAW Device Suited for Mass-Production”. Institute of Electrical and Electronics Engineers; 2001 IEEE Ultrasonics Symposium Proceedings, New York, NY; IEEE, US, vol. 2 of 2, pp. 221-224, Oct. 7, 2001.
H. Nguyen et al.; “A Substrate-Independent Wafer Transfer Technique for Surface-Micromachined Devices”. Proceeding IEEE Thirteenth Annual International Conference on Micro Electric Mechanical Systems; pp. 628-632, Jan. 23, 2000.
Takamori et al, Inter-Chip Optical Interconnection Using Planar Type Photonic Circuit and Optoelectronic Integrated Devices, Sep. 2001, pp. 784-792 (w/ translation).
Wada, Interconnection key component techniques, ELECTRONICS, Oct. 2000 (w/ translation).
H. Fathollahnejad et al., “The integration of GaAs vertical-cavity surface emitting lasers onto silicon circuitry,” High Speed Semiconductor Devices and Circuits, 1995, IEEE Proceedings, pp. 373-381, Aug. 7, 1995.

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