Peripheral device feature allowing processors to enter a low...

Registers – Systems controlled by data bearing records – Operations analysis

Reexamination Certificate

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C235S439000, C235S441000

Reexamination Certificate

active

10762767

ABSTRACT:
If a USB device is turned off or is not active, the device may be electrically disconnected from a USB host controller. The device may be electrically disconnected through a physical interface on the device. In some embodiments, if the device becomes active during a wait period (e.g., 2–3 seconds) prior to electrically disconnecting the device, the device may not be electrically disconnected. In some embodiments, when the device is electrically disconnected from the USB host controller and no system activity of a bus mastering peripheral is occurring, the CPU may enter a low power state if other conditions are met. In some embodiments, if the USB device becomes active after electrically disconnecting, the electrical disconnection may be discontinued.

REFERENCES:
patent: 4390964 (1983-06-01), Horky et al.
patent: 5541985 (1996-07-01), Ishii et al.
patent: 5630081 (1997-05-01), Rybicki et al.
patent: 5786769 (1998-07-01), Coteus et al.
patent: 5793359 (1998-08-01), Ushikubo
patent: 5815426 (1998-09-01), Jigour et al.
patent: 5841654 (1998-11-01), Verissimo et al.
patent: 5877483 (1999-03-01), Bilich et al.
patent: 5953511 (1999-09-01), Sescila, III et al.
patent: 6000607 (1999-12-01), Ohki et al.
patent: 6168077 (2001-01-01), Gray et al.
patent: 6230277 (2001-05-01), Nakaoka et al.
patent: 6279060 (2001-08-01), Luke et al.
patent: 6317839 (2001-11-01), Wells
patent: 6349878 (2002-02-01), Imai
patent: 6389544 (2002-05-01), Katagiri
patent: 6405362 (2002-06-01), Shih et al.
patent: 6435904 (2002-08-01), Herbst et al.
patent: 6438638 (2002-08-01), Jones et al.
patent: 6460143 (2002-10-01), Howard et al.
patent: 6467042 (2002-10-01), Wright et al.
patent: 6505267 (2003-01-01), Luke et al.
patent: 6510524 (2003-01-01), Osburn et al.
patent: 6519669 (2003-02-01), Yanagisawa
patent: 6557754 (2003-05-01), Gray et al.
patent: 6598100 (2003-07-01), Shu et al.
patent: 6601180 (2003-07-01), Paredes et al.
patent: 6654841 (2003-11-01), Lin
patent: 6714215 (2004-03-01), Flora et al.
patent: 6910627 (2005-06-01), Simpson-Young et al.
patent: 6928562 (2005-08-01), Cohen et al.
patent: 2002/0155893 (2002-10-01), Swanberg et al.
patent: 2003/0058284 (2003-03-01), Toh et al.
patent: 2003/0167345 (2003-09-01), Knight et al.
patent: 2004/0027879 (2004-02-01), Chang
patent: 2004/0163303 (2004-08-01), Dutton et al.
patent: 2005/0156038 (2005-07-01), Wurzburg et al.
patent: 07334633 (1995-12-01), None
patent: 08050463 (1996-02-01), None
U.S. Appl. No. 10/762,684, filed Jan. 20, 2004, Wurzburg.
“The Laptop Computer May Be Unable to Enter the C3 Processor Power-Saving State”, http://support.microsoft.com/default.aspx?scid=kbjen-us;297045, date unknown (Sep. 28, 2004 listed on article but their were earlier revisions).
“The Laptop Computer May Be Unable to Enter the C3 Processor Power-Saving State”, originally downloaded from: http://support.microsoft.com/default.aspx?scid=kbjen-us;297045; (Article publication date is unknown).

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