Patent
1983-09-01
1985-09-17
James, Andrew J.
357 52, 357 53, 357 73, H01L 2934, H01L 2940, H01L 2330
Patent
active
045424004
ABSTRACT:
A semiconductor device comprising a substrate means, a semiconductor layer of an N conductivity type formed on the substrate means, a first semiconductor region of a P conductivity type formed in the semiconductor layer and having its exposed major surface, a second semiconductor region of the N conductivity type formed in the first semiconductor region and having its exposed major surface, a first insulation layer means having a positive polarity type of charge and formed on the N semiconductor layer, and a second insulation layer means having a negative polarity type of charge and formed on the P semiconductor region.
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Gregor, "Controlling the Potential at a Semiconductor Surface", IBM Technical Disclosure Bulletin, vol. 11, No. 2, Jul. 1968, pp. 118-119.
J. F. Shepard et al., "Charge Control in Selected Areas of SiO.sub.2 ", IBM Technical Disclosure Bulletin, vol. 15, (1972), p. 1344.
Hiraki Shun-ichi
Koshino Yutaka
Kumamaru Kuniaki
Yonezawa Toshio
Carroll J.
James Andrew J.
Tokyo Shibaura Denki Kabushiki Kaisha
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