Package design using thermal linkage from die to printed...

Details Package design using thermal linkage from die to printed... Package design using thermal linkage from die to printed...

2007-04-03

2007-04-03

Le, Dung A. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

C257S713000, C257S737000, C257SE23105

Reexamination Certificate

active

10836329

ABSTRACT:
A substrate is provided that may include an area designated for mounting of an integrated circuit and one or more areas for retaining a thermal interface material proximate the integrated circuit mounting area. A thermal interface material containment area(s) may be formed by creating a through-hole in the substrate, or a recess in the substrate that opens either to the die placement side or the opposite side of the substrate.

REFERENCES:
patent: 6451418 (2002-09-01), Tobita
patent: 6900535 (2005-05-01), Zhou
patent: 2002/0079562 (2002-06-01), Zhao et al.
patent: 2003/0035269 (2003-02-01), Chiu
patent: 2003/0146519 (2003-08-01), Huang
patent: 2003/0150645 (2003-08-01), Chiu
patent: 2003/0183909 (2003-10-01), Chiu
patent: 2004/0184240 (2004-09-01), Su
patent: 2005/0023677 (2005-02-01), Zhao et al.
patent: 2005/0109534 (2005-05-01), Chengalva et al.

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