Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2007-03-20
2007-03-20
Owens, Douglas W. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S622000, C257S618000, C257S620000, C257S621000, C257S626000, C257S684000, C257S693000, C257S723000, C257S734000
Reexamination Certificate
active
10798555
ABSTRACT:
A plurality of semiconductor chips (14) each having a first main surface (14b) formed with electrode pads (21) and a second main surface (14c) opposite to the first main surface are respectively mounted on a chip mounting surface (12a) larger in area than the second main surface, of a wafer-shaped mounting substrate (12) at equal intervals so as to extend along first and second trenches (18a,18b) defined in the chip mounting surface with these trenches as target lines. Thereafter, solder balls (25) electrically connected to the electrode pads of the semiconductor chips are disposed on their corresponding wiring patterns34that extend from above first regions (100) located above the semiconductor chips, of a surface region of an encapsulating layer (32) covering the semiconductor chips to above second regions (200) that surround the first regions. Afterwards, the encapsulating layer and the mounting substrate are cut and thereby fractionized into semiconductor devices each having a fan-out structure.
REFERENCES:
patent: 6303470 (2001-10-01), Ohsumi et al.
patent: 6548895 (2003-04-01), Benavides et al.
patent: 2000-243901 (2000-09-01), None
patent: 2000-260733 (2000-09-01), None
patent: 2003-258157 (2003-09-01), None
Im Junghwa
Oki Electric Industry Co. Ltd.
Owens Douglas W.
Rabin & Berdo PC
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