Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-12-05
2006-12-05
Mai, Son L. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185030
Reexamination Certificate
active
07145809
ABSTRACT:
A method for programming a multi-level cell (MLC) is disclosed. First, a memory cell with a first storage position and a second storage position is provided. An erasing step is performed to increase the threshold voltages of the storage positions. Then, a judging step is preformed to compare the first programming state and the second programming state, which are going to be programmed for the first storage position and the second storage position, to select a proper programming step.
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“Phines: A Novel Low Power Program/Erase, Small Pitch, 2-Bit per Cell Flash Memory” By Author C.C. Yeh et al. / 2002 IEEE / p. 931-934.
J.C. Patents
Macronix International Co. Ltd.
Mai Son L.
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