Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2006-10-31
2006-10-31
Patel, Ishwar (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S261000, C257S686000
Reexamination Certificate
active
07129420
ABSTRACT:
A semiconductor device includes a semiconductor chip and a substrate having an interconnecting pattern formed thereover. The substrate has the semiconductor chip mounted on one surface thereof. The substrate has an outline larger than the semiconductor chip. First terminals are formed in a region outside the region of the substrate in which the semiconductor chip is mounted. Second terminals are a part of the interconnecting pattern which exposes its surface opposite to its surface opposing the semiconductor chip in a region closer to a center of the substrate than the first terminals. The semiconductor chip is electrically connected to the first and second terminals.
REFERENCES:
patent: 4149764 (1979-04-01), Mattingly
patent: 4692843 (1987-09-01), Matsumoto et al.
patent: 4897918 (1990-02-01), Osaka et al.
patent: 5343075 (1994-08-01), Nishino
patent: 5468995 (1995-11-01), Higgins, III
patent: 5579207 (1996-11-01), Hayden et al.
patent: 5594275 (1997-01-01), Kwon et al.
patent: 5600541 (1997-02-01), Bone et al.
patent: 5602420 (1997-02-01), Ogata et al.
patent: 5608265 (1997-03-01), Kitano et al.
patent: 5723903 (1998-03-01), Masuda et al.
patent: 6049467 (2000-04-01), Tamarkin et al.
patent: 6064111 (2000-05-01), Sota et al.
patent: 6087717 (2000-07-01), Ano et al.
patent: 6107679 (2000-08-01), Noguchi
patent: 6163957 (2000-12-01), Jiang et al.
patent: 6222265 (2001-04-01), Akram et al.
patent: 6237218 (2001-05-01), Ogawa et al.
patent: 6242815 (2001-06-01), Hsu et al.
patent: 6303997 (2001-10-01), Lee
patent: 6545228 (2003-04-01), Hashimoto
patent: 6707152 (2004-03-01), Schrock
patent: 05-129366 (1993-05-01), None
patent: 05-259306 (1993-10-01), None
patent: 06-013541 (1994-01-01), None
patent: 07-106509 (1995-04-01), None
patent: A 8-236694 (1996-09-01), None
patent: 09-022929 (1997-01-01), None
patent: 09-330961 (1997-12-01), None
patent: 10-135267 (1998-05-01), None
patent: 2000-243867 (2000-09-01), None
patent: 2001-085603 (2001-03-01), None
Oliff & Berridg,e PLC
Patel Ishwar
Seiko Epson Corporation
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