Patent
1989-03-07
1990-04-24
Hille, Rolf
357 55, 357 41, H01L 2978, H01L 2906, H01L 2702
Patent
active
049203894
ABSTRACT:
This invention relates to a memory cell array structure which comprises a low electric resistance semiconductor substrate and a number of memory cells. Each memory cell includes a capacitor portion and a switching element portion substantially provided thereon. The switching element portion comprises as one constituent region thereof one of electrodes, i.e., the second electrode of the capacitor portion. The second electrodes of all the memory cells are integrated altogether to constitute an integral common electrode which provides a separate region between the memory cells. With such a construction of the memory cell array structure, the area occupied by one memory cell is decreased and the cell-to-cell variation in the capacitor capacity is also decreased. This invention also relates to a process for producing such a memory cell array structure.
REFERENCES:
IBM Technical Disclosure Bulletin, vol. 30, No. 7, Dec. 1987, pp. 199-200.
Richardson et al., "A Trench Transistor Cross-Point DRAM Cell", IEDM 1985, pp. 714-717.
Hille Rolf
Limanek Robert P.
Manzo Edward D.
OKI Electric Industry Co., Ltd.
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