Signal processing circuit for noise elimination and...

Dynamic information storage or retrieval – Specific detail of information handling portion of system – Radiation beam modification of or by storage medium

Reexamination Certificate

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C369S124010, C369S059100

Reexamination Certificate

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07120110

ABSTRACT:
A signal processing circuit for eliminating noise from an input binary signal includes a measurement part and a signal output part. The measurement part measures the cumulative period of time of at least one of high-level and low-level states of the input binary signal for a predetermined period of time after the polarity of the input binary signal is inverted. The signal output part outputs at least one of high-level and low-level signals in accordance with the cumulative period of time.

REFERENCES:
patent: 5963582 (1999-10-01), Stansell, Jr.
patent: 6002708 (1999-12-01), Fleming et al.
Patent Abstracts of Japan—Publication No. 2001-243726 (2 pages) TEP010801A:070857 (Feb. 18, 1928) (in Japanese) (1 page).
2001-243726(P2001-243726A)(in Japanese) (21 pages).

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